TC3400: High speed / Low complexity TPC decoder
We offer several TPC decoder Cores offering selectable codes coverage and throughput levels. All Cores support parity and extended Hamming codes. Optional BCH double-error-correcting codes can be selected. These codes give typically better performance for very low BER (<1E-8) regions and lead to more complex Cores. 3-dimensional codes are also optionally supported, allowing to reach lower code rates (below 2/3). In general TPC solutions are very attractive for reaching the best throughput with lowest complexity encoder/decoder hardware. They offer good BER performance at high code rates (3/4 and above) and medium to large block size (4k to 16k block size). They are in essence less flexible than turbo convolutional codes, but can be shortened to accommodate a larger set of block size and code rate.
FEC technology: TPC
- Parity and Extended Hamming codes
- BCH double-error-correcting codes - optional
- Support for 3D-codes - optional
- Shortening (rows, columns and bits) for flexible block size/code rate support
Core features
- Throughput profiles (coded bitrate given with 4 iterations):
- TC3401 : up to 120 Mbps
- TC3404 : up to 420 Mbps
- BCH double-error correction codes - optional - gives better Eb/N0 for BER<1E-8)
- 3-dimensional code - optional - enables low code rates (below 2/3)
- Exact block size adaptation by shortening of rows, columns and bits
- On-the-fly (packet level) code switches
- Number of iterations: 2 to 16
- Latency reduction by bank-swap
- Built-in stopping rule for average throughput increase and reduced power consumption
- Memory versus Logic usage balancing options
- Encoder and decoder Cores